1. Field of the Invention
The present invention relates to a recticle pattern of a lithography process and an alignment method thereof. More particularly, the present invention relates to a recticle pattern applied to a mix-and-match lithography process and an alignment method thereof.
2. Description of Related Art
Lithography can be considered as one of the most important steps in the entire semiconductor fabricating process, and all regions related to metal-oxide-semiconductor (MOS) devices, for example, the pattern of each thin film layer and doped regions are determined by the lithography step. However, the line width required in lithography technology has become smaller and smaller along with the increase in the integration of semiconductor IC, so that the commonly used optical lithography technology becomes unable to meet the requirement of the existing process. E-beam lithography technology has to be adopted to further increase the integration of IC. However, e-beam lithography technology has disadvantages such as low throughput even though it can define smaller size of IC.
Accordingly, a mix-and-match lithography technology has been introduced to resolve the problems for developing lithography technology. According to the mix-and-match lithography technology, device patterns are fabricated by combining the optical and the e-beam lithography technology, wherein deep ultra violet ray (DUV) is generally used as the light source in the optical lithography technology. The working theory of the mix-and-match lithography technology is: optical lithography technology is used for processing large size patterns, and e-beam lithography technology is used for processing limited size patterns. Thus, the mix-and-match lithography technology keeps both the high resolution and high integration of e-beam lithography technology and the high throughput of optical lithography technology. However, this mix-and-match lithography technology still has some problems, for example, the problems of inaccurate alignment of the figures between two exposure systems, the design of alignment method and alignment marks.
In addition, some related technologies are disclosed in some patents such as JP 63148627, JP 9167734, TW 508641, and U.S. Pat. No. 5,952,134. All the foregoing documents are used as references by the present disclosure.